A three dimensionally mounted semiconductor device 200 shown in FIG. 28 is a conventional three dimensionally mounted semiconductor device disclosed in U.S. Pat. No. 6,576,992 (Patent Document 1). The device is a three dimensionally mounted semiconductor device structured such that a first chip size package (CSP) 201 of ball grid array (BGA) type is mounted on a first flexible circuit substrate 203 and a second flexible circuit substrate 204, and the two flexible circuit substrates are folded so that the two flexible circuit substrates are adhered to the backside of the first CSP 201 (an opposite side of the first CSP 201 to a side on which solder balls 205 are mounted) by an adhesive 206, and a second CSP 202 is mounted on the first and second fixed flexible circuit substrates 203 and 204. The device is a solution to miniaturize an electric device using the CSPs since a mounting area becomes half compared with an area when two CSPs are mounted two dimensionally.
The device has another merit that the CSPs are checked and quality assured at the time of purchasing, and therefore it is easy to obtain the CSP devices even for non-manufacturers (generally it is difficult to obtain bear chips for manufacturers except semiconductor makers) and also an inspection cost for the manufacturers can be much reduced. As a result, even equipment or component manufacturers except semiconductor manufacturers can fabricate various kinds of small-sized and low-cost three dimensionally mounted semiconductor devices by combining the CSPs.
In addition, Patent Document 2 (JP Patent Kokai Publication No. JP-P2002-76263A) discloses a technique to control a position of folding by providing a stiffened pattern on a flexible substrate. Patent Document 3 (JP Patent Kokai Publication No JP-H10-112478A) discloses a mounting method to restrict a warp of a BGA package during heating process using an adhesive or spacer.
[Patent Document 1] U.S. Pat. No. 6,576,992
[Patent Document 2] JP Patent Kokai Publication No. JP-P2002-76263A
[Patent Document 3] JP Patent Kokai Publication No. JP-H10-112478A